Solutions Overview
Introducing the Dragonfly Test Platformú for Comprehensive SOC Self-test and Diagnostics
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One of the greatest challenges facing semiconductor manufacturers today is achieving acceptable product quality levels while minimizing escalating test costs. This is especially true as the industry moves to 65nm and 45nm process geometries and beyond. LogicVisionâs Dragonfly Test Platform delivers a comprehensive portfolio of Built-In Self-Test (BIST) solutions that provide the most cost effective approach to achieving the lowest possible DPM levels. These BIST capabilities also provide very powerful debug and diagnostic capabilities as they essentially allow for reporting from the inside out, providing unprecedented visibility into the IC. Designers, test engineers, fabricators, and systems manufacturers, even the end user, can see whatâs going on inside the circuit at any point in time through our "eyes" in the die. The result is fast silicon bring-up and much more effective failure analysis activities. These are both key to meeting shrinking product windows.
Silicon Test
Dragonfly delivers a comprehensive hierarchical BIST infrastructure that covers all components of a complex SOC. The BIST infrastructure is integrated using an advanced RTL or gate-level design automation tool flow fully compatible with all major EDA flows. Customized BIST capabilities are automatically created and integrated into the design. BIST capabilities are available for at-speed test and diagnosis of embedded memories, high-speed random logic, parallel I/O, hi-speed SerDes and DDR I/O, PLLs and more. Dragonfly’s design automation tools are also used to create a LogicVision database (LVDB™). This database contains extensive information about the BIST capabilities including such things as access protocols, execution options, and test result signatures. The LVDB provides a vectorless link to LogicVision’s real-time silicon debug solutions, the Silicon Insight™ family of products, as well as LogicVision’s production datalogging infrastructure.
Silicon Debug
The Silicon Insight software interfaces to popular test-platforms or to a customer performance board using a simple laptop, to control and interpret results from the BIST capabilities within the device under test. This integrated solution provides a fully automated and powerful environment for at-speed debugging of silicon. The solution eliminates dependence on test vectors, test programs, expensive test equipment, and raw ATE failure data. The automated flow provides a fully symbolic debug environment and provides explicit, real-time failure information such as memory bit location or logic net name. The solution can greatly increase productivity for chip designers and test engineers during the critical phase of silicon validation and debug, speeding time-to-market yield.
Once in manufacturing, the same accurate diagnostic and analytic capabilities provided for silicon debug are available in a batch datalogging mode. This allows accurate failure and performance data to be accumulated over time to then feed failure analysis processes and yield analysis tools such as LogicVision’s Yield Insight™.
Silicon Analysis
For silicon analysis, LogicVision's Yield Insight rule-based yield learning tool leverages detailed manufacturing test data generated using LogicVision's BIST capabilities, to provide detailed sub-die level failure and performance monitoring capabilities to help accelerate yield ramps and improve overall yields. Yield Insight offers a structured and highly effective yield learning platform that can be used during the entire semiconductor manufacturing and test cycle, starting from silicon bring-up and characterization, and extending into the yield ramp and volume manufacturing stages. This analysis feeds back to design and manufacturing to allow learning to improve future yields.